A Lecture by Dr. Chengmo Yang on “NVM-friendly Placement and Routing in FPGAs”
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A Lecture by Dr. Chengmo Yang on “NVM-friendly Placement and Routing in FPGAs”
DateandTime: 2016-01-07 14:00:24

Speaker: Dr. Chengmo Yang, Assistant Professor, University of Delaware, USA

Date: January 7, 2016

Time: 2:00p.m.-3:00p.m.

Location: Room 202, 2nd Floor, Office Building, Software Campus

Sponsor: the School of Computer Science and Technology

Abstract: Non-volatile memory (NVM) technologies have been known for their advantages of large capacity, low energy consumption, high error-resistance, and near-zero power-on delay. It is expected that they will replace traditional SRAM as FPGA reconfigurable blocks. While NVMs promise FPGAs with more reconfigurable resources, lower power consumption, and higher resilience to power interruptions, they also impose two new design challenges: the slow write performance of NVMs may degrade FPGA reconfiguration speed, while their limited write endurance constrains FPGA programming cycles. None of these NVM features are taken into consideration in current FPGA synthesis tools, which have been optimized solely for SRAM-based FPGAs. To tackle this limitation, this talk will present a set of similarity-driven approaches to reduce reconfiguration cost in NVM-based FPGAs. When synthesizing a new design, its similarity to the design currently on the FPGA is characterized by taking both LUT contents and CLB-level topology into consideration. The proposed NVM-aware placement and routing algorithms have been incorporated in the Verilog-to-Routing (VTR) CAD tool to demonstrate their efficacy.

Bio: Prof. Chengmo Yang received a B.S. degree in Microelectronics from Peking University, China in 2003, a M.S. and a Ph.D. degree in Computer Engineering from the University of California, San Diego in 2005 and 2010, respectively. She is currently an assistant professor in the Department of Electrical and Computer Engineering at the University of Delaware. Her research interests lie in the broad areas of computer architecture, embedded systems, and design automation, with a particular focus on the improvement of reliability, security, non-volatility, and energy-efficiency of next generation processor and memory systems. Dr. Yang has published 50 technical papers at first-tier conferences and journals. She received the NSF Career Award in 2013. She is currently recruiting Ph.D. students.

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Edited by: Li Ao

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